MIPS: KVM: Recognise r6 CACHE encoding

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Recognise the new MIPSr6 CACHE instruction encoding rather than the
pre-r6 one when an r6 kernel is being built. A SPECIAL3 opcode is used
and the immediate field is reduced to 9 bits wide since MIPSr6.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim KrÄmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

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James Hogan 2016-07-04 19:35:13 +01:00 • committed by Paolo Bonzini

parent 2e0badfaac

commit 5cc4aafced

2 changed files with 24 additions and 2 deletions

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5

arch/mips/kvm/dyntrans.c

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21

arch/mips/kvm/emulate.c

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