PCI: cadence: Add flags for disabling ASPM capability for broken Root Ports

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Add flags for disabling the ASPM L0s/L1 capability for broken Root Ports
by clearing the corresponding bits in Link Capabilities Register through
the local management bus. This allows ASPM to be disabled on platforms
which don't support it.

Signed-off-by: Yao Zi <me@ziyao.cc>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Han Gao <gaohan@iscas.ac.cn>
Tested-by: Chen Wang <unicorn_wang@outlook.com> # Pioneerbox
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://patch.msgid.link/20260405154154.46829-2-me@ziyao.cc

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Yao Zi 2026-04-05 15:41:53 +00:00 • committed by Bjorn Helgaas

parent 6de23f81a5

commit 5ccc76a87f

2 changed files with 26 additions and 0 deletions

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7

drivers/pci/controller/cadence/pcie-cadence-host.c

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19

drivers/pci/controller/cadence/pcie-cadence.h

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