diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index afcfb92fb9f5..c59a8f99ecdf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -178,9 +178,7 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
 
 	if (adev->kfd.dev) {
 		struct kgd2kfd_shared_resources gpu_resources = {
-			.compute_vmid_bitmap =
-				((1 << AMDGPU_NUM_VMID) - 1) -
-				((1 << adev->vm_manager.first_kfd_vmid) - 1),
+			.compute_vmid_bitmap = adev->vm_manager.vmid_uq_mask_gfxhub,
 			.num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec,
 			.num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe,
 			.gpuvm_size = min(adev->vm_manager.max_pfn
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
index 4e37de79f031..9cdd8870960a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
@@ -646,6 +646,22 @@ void amdgpu_vmid_mgr_set_vmid_mask(struct amdgpu_device *adev,
 	}
 }
 
+/**
+ * amdgpu_vmid_uq_mask_init - init the user queue VMID masks
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Sets vmid_uq_mask_gfxhub/mmhub to the pool of VMIDs at or above
+ * first_kfd_vmid, shared by KFD and MES user queues.
+ */
+static void amdgpu_vmid_uq_mask_init(struct amdgpu_device *adev)
+{
+	adev->vm_manager.vmid_uq_mask_gfxhub =
+		((1U << AMDGPU_NUM_VMID) - 1) &
+		~((1U << adev->vm_manager.first_kfd_vmid) - 1);
+	adev->vm_manager.vmid_uq_mask_mmhub = 0xFF00;
+}
+
 /**
  * amdgpu_vmid_mgr_init - init the VMID manager
  *
@@ -657,6 +673,8 @@ void amdgpu_vmid_mgr_init(struct amdgpu_device *adev)
 {
 	unsigned i, j;
 
+	amdgpu_vmid_uq_mask_init(adev);
+
 	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {
 		struct amdgpu_kq_vmid_mgr *id_mgr =
 			&adev->vm_manager.id_mgr[i];
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index d1e956cf8e5b..8d813c68450b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -111,7 +111,6 @@ static void amdgpu_mes_userq_notify_unmap_work_handler(struct work_struct *work)
 int amdgpu_mes_init(struct amdgpu_device *adev)
 {
 	int i, r, num_pipes, num_queues = 0;
-	u32 total_vmid_mask, reserved_vmid_mask;
 	int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1;
 	u32 gfx_hqd_mask = amdgpu_mes_get_hqd_mask(adev->gfx.me.num_pipe_per_me,
 				adev->gfx.me.num_queue_per_pipe,
@@ -134,12 +133,6 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
 	atomic_set(&adev->mes.userq_hw_queue_count, 0);
 	INIT_DELAYED_WORK(&adev->mes.userq_notify_unmap_work,
 			  amdgpu_mes_userq_notify_unmap_work_handler);
-	total_vmid_mask = (u32)((1UL << 16) - 1);
-	reserved_vmid_mask = (u32)((1UL << adev->vm_manager.first_kfd_vmid) - 1);
-
-	adev->vm_manager.vmid_uq_mask_mmhub = 0xFF00;
-	adev->vm_manager.vmid_uq_mask_gfxhub = total_vmid_mask & ~reserved_vmid_mask;
-
 	num_pipes = adev->gfx.me.num_pipe_per_me * adev->gfx.me.num_me;
 	if (num_pipes > AMDGPU_MES_MAX_GFX_PIPES)
 		dev_warn(adev->dev, "more gfx pipes than supported by MES! (%d vs %d)\n",