drm/i915/tgl: Add and use new DC5 and DC6 residency counter registers

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Tiger Lake has a new register offset for DC5 and DC6 residency counters.

v2:
  - Rename registers since they are not in the CSR memory range
    (requested by Anshuman)
  - Fix type (requested by Matthew)

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190726002412.5827-2-lucas.demarchi@intel.com

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José Roberto de Souza 2019-07-25 17:24:10 -07:00 • committed by Lucas De Marchi

parent 01158da721

commit 5d571068f7

2 changed files with 15 additions and 8 deletions

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21

drivers/gpu/drm/i915/i915_debugfs.c

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2

drivers/gpu/drm/i915/i915_reg.h

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