iommu/arm-smmu: Fix the values of ARM64_TCR_{I,O}RGN0_SHIFT

Browse source

The arm64 CPU architecture defines TCR[8:11] as holding the inner and
outer memory attributes for TTBR0.

This patch fixes the ARM SMMUv3 driver to pack these bits into the
context descriptor, rather than picking up the TTBR1 attributes as it
currently does.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

...

This commit is contained in:

Zhen Lei 2015-06-26 09:32:59 +01:00 • committed by Will Deacon

parent d2e88e7c08

commit 5d58c6207c

1 changed files with 2 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

4

drivers/iommu/arm-smmu-v3.c

View file