drm/amd/display: Clamp VStartup value at DML calculations time

[why]
Some timings with a large VBlank cause the value to overflow the
register related, while also producing other wrong values in DML output.

[how]
Clamp VStartup at the DCN3.1 maximum value

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nikola Cornij 2021-06-07 20:36:05 -04:00 • committed by Alex Deucher
commit 5d9e7fe8ef