intel_idle: add BXT support

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Broxton has all the HSW C-states, except C3.
BXT C-state timing is slightly different.

Here we trust the IRTL MSRs as authority
on maximum C-state latency, and override the driver's tables
with the values found in the associated IRTL MSRs.
Further we set the target_residency to 1x maximum latency,
trusting the hardware demotion logic.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

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Len Brown 2016-04-06 17:00:47 -04:00 • committed by Rafael J. Wysocki

parent c998c07836

commit 5dcef69486

2 changed files with 145 additions and 0 deletions

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8

arch/x86/include/asm/msr-index.h

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137

drivers/idle/intel_idle.c

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