clk: sunxi-ng: a64: Add max. rate constraint to video PLLs

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Video PLLs on A64 can be set to higher rate that it is actually
supported by HW.

Limit maximum rate to 1008 MHz. This is the maximum allowed rate by BSP
clock driver. Interestengly, user manual specifies maximum frequency to
be 600 MHz. Historically, this data was wrong in some user manuals for
other SoCs, so more faith is put in BSP clock driver.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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Icenowy Zheng 2018-09-04 12:40:44 +08:00 • committed by Maxime Ripard

parent 65b1e8a6ca

commit 5de39acaf3

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1 changed files with 26 additions and 24 deletions

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drivers/clk/sunxi-ng/ccu-sun50i-a64.c

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