drm/amd/display: Add required FRL registers for DCN31

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This commit introduces multiple hardware registers necessary to enable
FRL on AMD devices.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Rodrigo Siqueira 2023-05-18 13:49:27 -06:00 • committed by Alex Deucher

parent 4305b6e970

commit 5dfcaecc7e

2 changed files with 657 additions and 0 deletions

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109

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_offset.h

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548

drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_1_2_sh_mask.h

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