drm/i915/chv: Use 16 and 32 for low and high drain latency precision.

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Current chv spec teels we can only use either 16 or 32 bits as precision.

Although in the past VLV went from 16/32 to 32/64 and spec might not be updated,
these precision values brings stability and fixes some issues Wayne was facing.

Cc: Wayne Boyer <wayne.boyer@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Wayne Boyer <wayne.boyer@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Sprinkle const as requested by Ville.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Rodrigo Vivi 2014-10-17 08:05:08 -07:00 • committed by Daniel Vetter

parent f7f3d48ac8

commit 5e56ba4505

2 changed files with 32 additions and 21 deletions

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13

drivers/gpu/drm/i915/i915_reg.h

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40

drivers/gpu/drm/i915/intel_pm.c

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