drm/msm/dpu: fix SSPP register definitions

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Reorder SSPP register definitions to sort them in the ascending order.
Move register bitfields after the register definitions.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/537903/
Link: https://lore.kernel.org/r/20230518222238.3815293-2-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

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Dmitry Baryshkov 2023-05-19 01:22:30 +03:00

parent 6c93a21d92

commit 5f31d7e61d

1 changed files with 32 additions and 32 deletions

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drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c

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