ARM: l2c: add decode for L2C-220 cache ways

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Rather than assuming these are always 8-way, it can be decoded from the
auxillary register in the same manner as L2C-210.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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Russell King 2014-03-15 23:07:07 +00:00

parent 051334bdc5

commit 5f47c38704

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arch/arm/mm/cache-l2x0.c

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