drm/i915/fbc: Implement Wa_16011863758 for icl+

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There's some kind of weird corner cases in FBC which requires
FBC segments to be separated by at least one extra cacheline.
Make sure that is present.

v2: Respin to fit in with skl_fbc_min_cfb_stride()
v3: Make it build

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210921181245.15091-1-ville.syrjala@linux.intel.com

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Ville Syrjälä 2021-09-21 21:12:45 +03:00

parent 2f051f6774

commit 5f524aea39

1 changed files with 10 additions and 2 deletions

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drivers/gpu/drm/i915/display/intel_fbc.c

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