mfd: intel-m10-bmc: Support multiple CSR register layouts

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There are different addresses for the MAX10 CSR registers. Introducing
a new data structure m10bmc_csr_map for the register definition of
MAX10 CSR.

Provide the csr_map for SPI.

Co-developed-by: Tianfei zhang <tianfei.zhang@intel.com>
Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com>
Reviewed-by: Russ Weight <russell.h.weight@intel.com>
Reviewed-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230116100845.6153-6-ilpo.jarvinen@linux.intel.com

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Ilpo Järvinen 2023-01-16 12:08:39 +02:00 • committed by Lee Jones

parent 603aed8ffd

commit 6052a005ca

4 changed files with 111 additions and 33 deletions

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73

drivers/fpga/intel-m10-bmc-sec-update.c

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10

drivers/mfd/intel-m10-bmc-core.c

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23

drivers/mfd/intel-m10-bmc-spi.c

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38

include/linux/mfd/intel-m10-bmc.h

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