drm/radeon: implement async vm_flush for the sDMA (v6)

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Update the page table base address and flush the
VM TLB using the sDMA.

V2: update for 2 level PTs
V3: update vm flush
V4: update SH_MEM* regs
V5: switch back to old style VM TLB invalidate
V6: fix packet formatting

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Alex Deucher 2012-10-22 13:04:03 -04:00

parent 21a93e130d

commit 605de6b97e

1 changed files with 70 additions and 0 deletions

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drivers/gpu/drm/radeon/cik.c

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