bindings: PCI: artpec: correct pci binding example

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- Increase config size. When using a PCIe switch,
   the previous config size only had room for one device.
 - Add bus range. Inherited optional property.
 - Map downstream I/O to PCI address 0. We can map it to any
   address, but let's be consistent with other drivers.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Rob Herring <robh@kernel.org>

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Niklas Cassel 2016-08-26 00:01:56 +02:00 • committed by Rob Herring

parent 5839783247

commit 610e128374

1 changed files with 4 additions and 3 deletions

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7

Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt

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