drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2)

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Despite having different IP offsets the computed address of the register(s)
are the same between gfx7..gfx10.  This patch fixes the offset relative
to the GC block on gfx10.

(v2): SQ_DEBUG_STS_GLOBAL2 is 0x10 higher ...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Tom St Denis 2020-06-16 08:47:04 -04:00 • committed by Alex Deucher

parent 9fb1067101

commit 614c56111c

2 changed files with 4 additions and 4 deletions

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4

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

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4

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

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