dt-bindings: riscv: Add Andes PMU extension description

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Document the ISA string for Andes Technology performance monitor
extension which provides counter overflow interrupt and mode
filtering mechanisms.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20240222083946.3977135-9-peterlin@andestech.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

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Yu Chien Peter Lin 2024-02-22 16:39:44 +08:00 • committed by Palmer Dabbelt

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Documentation/devicetree/bindings/riscv/extensions.yaml

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