sh: fix Transfer Size calculation in both DMA drivers

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Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers
do not take into account bits 3:2 of the Transfer Size field in the CHCR
register, besides, bit-field defines set bit 2, but the mask only passes bits
1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all
these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to
be fixed too.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

...

This commit is contained in:

Guennadi Liakhovetski 2010-02-03 14:44:12 +00:00 • committed by Paul Mundt

parent fc4618575f

commit 623b4ac4bf

6 changed files with 114 additions and 51 deletions

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5

arch/sh/drivers/dma/dma-sh.c

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2

arch/sh/include/asm/dma-sh.h

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20

arch/sh/include/cpu-sh3/cpu/dma.h

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97

arch/sh/include/cpu-sh4/cpu/dma-sh4a.h

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35

arch/sh/include/cpu-sh4/cpu/dma.h

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6

drivers/dma/shdma.c

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