drm/msm/adreno: Disable IFPC when sysprof is active

Browse source

Moving to IFPC state clears the 'Perfcounter Select' register setup
by the userspace. So, lets block the IFPC when sysprof is active by
using the perfcounter oob signal to the GMU.

Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/673380/
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

...

This commit is contained in:

Akhil P Oommen 2025-09-08 13:57:06 +05:30 • committed by Rob Clark

parent a242ef4a75

commit 62cd0fa699

6 changed files with 47 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

37

drivers/gpu/drm/msm/adreno/a6xx_gmu.c

View file

2

drivers/gpu/drm/msm/adreno/a6xx_gmu.h

View file

2

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

View file

1

drivers/gpu/drm/msm/adreno/a6xx_gpu.h

View file

1

drivers/gpu/drm/msm/msm_gpu.h

View file

4

drivers/gpu/drm/msm/msm_submitqueue.c

View file