From 6b84ca265fe5fb15863202544ccff8090a1b4425 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 18 Feb 2020 16:12:21 -0800 Subject: [PATCH 1/3] ARM: brcmstb: Add debug UART entry for 72614 72164 has the same memory map as 7278 and the same physical address for the UART, alias the definition accordingly. Signed-off-by: Florian Fainelli --- arch/arm/include/debug/brcmstb.S | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S index 132a20c4a676..79223209d3f4 100644 --- a/arch/arm/include/debug/brcmstb.S +++ b/arch/arm/include/debug/brcmstb.S @@ -32,6 +32,7 @@ #define UARTA_7271 UARTA_7268 #define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000) #define UARTA_7216 UARTA_7278 +#define UARTA_72164 UARTA_7278 #define UARTA_7364 REG_PHYS_ADDR(0x40b000) #define UARTA_7366 UARTA_7364 #define UARTA_74371 REG_PHYS_ADDR(0x406b00) @@ -84,17 +85,18 @@ ARM_BE8( rev \rv, \rv ) /* Chip specific detection starts here */ 20: checkuart(\rp, \rv, 0x33900000, 3390) 21: checkuart(\rp, \rv, 0x72160000, 7216) -22: checkuart(\rp, \rv, 0x72500000, 7250) -23: checkuart(\rp, \rv, 0x72550000, 7255) -24: checkuart(\rp, \rv, 0x72600000, 7260) -25: checkuart(\rp, \rv, 0x72680000, 7268) -26: checkuart(\rp, \rv, 0x72710000, 7271) -27: checkuart(\rp, \rv, 0x72780000, 7278) -28: checkuart(\rp, \rv, 0x73640000, 7364) -29: checkuart(\rp, \rv, 0x73660000, 7366) -30: checkuart(\rp, \rv, 0x07437100, 74371) -31: checkuart(\rp, \rv, 0x74390000, 7439) -32: checkuart(\rp, \rv, 0x74450000, 7445) +22: checkuart(\rp, \rv, 0x07216400, 72164) +23: checkuart(\rp, \rv, 0x72500000, 7250) +24: checkuart(\rp, \rv, 0x72550000, 7255) +25: checkuart(\rp, \rv, 0x72600000, 7260) +26: checkuart(\rp, \rv, 0x72680000, 7268) +27: checkuart(\rp, \rv, 0x72710000, 7271) +28: checkuart(\rp, \rv, 0x72780000, 7278) +29: checkuart(\rp, \rv, 0x73640000, 7364) +30: checkuart(\rp, \rv, 0x73660000, 7366) +31: checkuart(\rp, \rv, 0x07437100, 74371) +32: checkuart(\rp, \rv, 0x74390000, 7439) +33: checkuart(\rp, \rv, 0x74450000, 7445) /* No valid UART found */ 90: mov \rp, #0 From 2ca0c6a30fc3077a6010ca6ea8f3654915c8f35c Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 18 Jun 2019 16:07:29 -0700 Subject: [PATCH 2/3] ARM: bcm: Enable BCM7038_L1_IRQ for ARCH_BRCMSTB ARCH_BRCMSTB makes use of the irq-bcm7038-l1.c irqchip driver, enable it. Signed-off-by: Florian Fainelli --- arch/arm/mach-bcm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 1df0ee01ee02..ae790908fc74 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -208,6 +208,7 @@ config ARCH_BRCMSTB select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER + select BCM7038_L1_IRQ select BRCMSTB_L2_IRQ select BCM7120_L2_IRQ select ARCH_HAS_HOLES_MEMORYMODEL From 4e5cafa8b3ea45cb17aa6b538fb439abefc0029e Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Fri, 28 Feb 2020 11:31:43 -0800 Subject: [PATCH 3/3] ARM: brcmstb: Add debug UART entry for 72615 72165 has the same memory map as 7278 and the same physical address for the UART, alias the definition accordingly. Signed-off-by: Florian Fainelli --- arch/arm/include/debug/brcmstb.S | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S index 79223209d3f4..d693565af23c 100644 --- a/arch/arm/include/debug/brcmstb.S +++ b/arch/arm/include/debug/brcmstb.S @@ -33,6 +33,7 @@ #define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000) #define UARTA_7216 UARTA_7278 #define UARTA_72164 UARTA_7278 +#define UARTA_72165 UARTA_7278 #define UARTA_7364 REG_PHYS_ADDR(0x40b000) #define UARTA_7366 UARTA_7364 #define UARTA_74371 REG_PHYS_ADDR(0x406b00) @@ -86,17 +87,18 @@ ARM_BE8( rev \rv, \rv ) 20: checkuart(\rp, \rv, 0x33900000, 3390) 21: checkuart(\rp, \rv, 0x72160000, 7216) 22: checkuart(\rp, \rv, 0x07216400, 72164) -23: checkuart(\rp, \rv, 0x72500000, 7250) -24: checkuart(\rp, \rv, 0x72550000, 7255) -25: checkuart(\rp, \rv, 0x72600000, 7260) -26: checkuart(\rp, \rv, 0x72680000, 7268) -27: checkuart(\rp, \rv, 0x72710000, 7271) -28: checkuart(\rp, \rv, 0x72780000, 7278) -29: checkuart(\rp, \rv, 0x73640000, 7364) -30: checkuart(\rp, \rv, 0x73660000, 7366) -31: checkuart(\rp, \rv, 0x07437100, 74371) -32: checkuart(\rp, \rv, 0x74390000, 7439) -33: checkuart(\rp, \rv, 0x74450000, 7445) +23: checkuart(\rp, \rv, 0x07216500, 72165) +24: checkuart(\rp, \rv, 0x72500000, 7250) +25: checkuart(\rp, \rv, 0x72550000, 7255) +26: checkuart(\rp, \rv, 0x72600000, 7260) +27: checkuart(\rp, \rv, 0x72680000, 7268) +28: checkuart(\rp, \rv, 0x72710000, 7271) +29: checkuart(\rp, \rv, 0x72780000, 7278) +30: checkuart(\rp, \rv, 0x73640000, 7364) +31: checkuart(\rp, \rv, 0x73660000, 7366) +32: checkuart(\rp, \rv, 0x07437100, 74371) +33: checkuart(\rp, \rv, 0x74390000, 7439) +34: checkuart(\rp, \rv, 0x74450000, 7445) /* No valid UART found */ 90: mov \rp, #0