drm/amd/display: have two different sr and pstate latency tables for renoir

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[Why]
new sr and pstate latencies are optimized for the case when we are not
using lpddr4 memory

[How]
have two different wm tables, one for the lpddr case and one for
non lpddr case

Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Joseph Gravenor 2019-11-08 14:30:34 -05:00 • committed by Alex Deucher

parent 8fb3a63636

commit 639dcfc6fe

1 changed files with 80 additions and 34 deletions

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114

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

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