clk: imx5: Fix i.MX50 mainbus clock registers

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i.MX50 does not have a periph_apm clock. Instead, the main bus clock
(a.k.a. periph_clk) comes directly from a MUX between pll1_sw, pll2_sw,
pll3_sw, and lp_apm.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Jonathan Neuschäfer 2019-03-26 19:22:57 +01:00 • committed by Shawn Guo

parent 9e98c678c2

commit 639eb92531

1 changed files with 15 additions and 4 deletions

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drivers/clk/imx/clk-imx51-imx53.c

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