ASoC: da7219: Update PLL ranges and dividers to improve locking

The expected MCLK frequency ranges and the associated dividers
are updated to improve PLL locking in a corner scenario, with low
MCLK frequency near an input divider change boundary.

Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Adam Thomson 2016-04-19 15:19:02 +01:00 • committed by Mark Brown
commit 63a450aa4d
2 changed files with 24 additions and 24 deletions