RISC-V: Add arch functions for non-retentive suspend entry/exit

The hart registers and CSRs are not preserved in non-retentative suspend state so we provide arch specific helper functions which will save/restore hart context upon entry/exit to non-retentive suspend state. These helper functions can be used by cpuidle drivers for non-retentive suspend entry/exit. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2026-09-28 19:20:30 +00:00 · 2022-02-10 11:19:42 +05:30 · 2022-02-10 11:19:42 +05:30 · 63b13e64a8
commit 63b13e64a8
parent e1de2c93e7
7 changed files with 279 additions and 21 deletions
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
--- a/arch/riscv/include/asm/suspend.h
+++ b/arch/riscv/include/asm/suspend.h
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
--- a/arch/riscv/kernel/suspend.c
+++ b/arch/riscv/kernel/suspend.c
--- a/arch/riscv/kernel/suspend_entry.S
+++ b/arch/riscv/kernel/suspend_entry.S