drm/i915: Fix HSW+ DP MSA YCbCr colorspace indication

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Looks like we're currently setting the MSA to xvYCC BT.709 instead
of the YCbCr BT.601 claimed by the comment. But even that comment
is wrong since we configure the CSC matrix to BT.709.

Let's remove the bogus statement from the comment and fix the
MSA to indicate YCbCr BT.709 so that it matches the actual
pixel data we're transmitting.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190718145053.25808-3-ville.syrjala@linux.intel.com
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>

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This commit is contained in:

Ville Syrjälä 2019-07-18 17:50:43 +03:00

parent 35d97e43bb

commit 646d3dc855

2 changed files with 6 additions and 3 deletions

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6

drivers/gpu/drm/i915/display/intel_ddi.c

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3

drivers/gpu/drm/i915/i915_reg.h

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