Renesas DTS updates for v6.7 (take two)

- Improve audio clock accuracy on the RZ/{G2L,G2LC,V2L} SMARC EVK
     development boards,
   - Add FLASH support for the Renesas Bock-W development board,
   - Add L2 cache and non-coherent DMA support on the RZ/Five SoC and the
     RZ/Five SMARC development board,
   - Add initial support for the RZ/G3S SoC and the RZ/G3S SMARC SoM and
     SMARC Carrier-II EVK development boards,
   - Add initial support for the R8A779F4 variant of the R-Car S4-8 SoC
     and the R-Car S4 Starter Kit development board,
   - Apply DT overlays to base DTBs to improve validation and usability.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZSkx1QAKCRCKwlD9ZEnx
 cPRnAP9I5dtR2xpi5qNeEOCdWmyRXLndJ3fVzhQJkPrytjIuhQD/alIpNXsEZD08
 +BUSN+3SZDfmyExNYbgUlhsVqkqEywE=
 =avuX
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmUprLIACgkQYKtH/8kJ
 UiedcQ/+IK8POuuE10T++//UNAeloqNZ+MOblCTTFc6Tvn8nqphA3ebmrY3myKNo
 UY+tKcPOSz3koWJPAZ6GAPRATa+XAUyx+IVfy7NGPfIP9zgglmiGJlLfL908xOkR
 M905CGRfSIr7u2qgQX/tBVkougIplHJPjgWpX9r6ypQtvsO1hOt5SABdX/kSeSfq
 M3SQ7f6dV7fSplw7sdx6yyxEPMQxhXt7kGBobuPTaZnFGWT6F+dAjS9CettKsTwV
 +n4Cw2zoK3CgpvVQGgW7mzRZ4XxxVPBBDULYT1P5cFc5XQlrU3PscBwofhAYj/qG
 dhwuobByTeXux1f6Bi3dOHCQ7yZvJpiZdm/4Jat8lBkl/8Flo+EqWHs6E80nNDhr
 Q4huloIjlKj9f/aXb89Nbh1b7Nre21Qv1RXBPGaF7JkguCTsTn4WofMJ7OPoIYDS
 hRYuKZv2QgK5iB8DDvZaZ5rkypnhu2runuDtX01OSlIPJ2nC12Z3rNNtTJtUCWi0
 LLHiNaB0r4eTTYtHtvy4421wOGr+E2rwlWfHGbLG+M4UmK2NRv+nX04vDGQiyfQy
 WrxY2ksFikVHj+nWVQPmhfC6T8F8OJmPNZ/nPOnv+66Ns48lYya0pt00Piqe7ueF
 hX7MSNBiD56cNC5lV/3lxg4T2ijHLTCFsrgqTU9+RZR7+/alGA8=
 =e3Zm
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dts-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.7 (take two)

  - Improve audio clock accuracy on the RZ/{G2L,G2LC,V2L} SMARC EVK
    development boards,
  - Add FLASH support for the Renesas Bock-W development board,
  - Add L2 cache and non-coherent DMA support on the RZ/Five SoC and the
    RZ/Five SMARC development board,
  - Add initial support for the RZ/G3S SoC and the RZ/G3S SMARC SoM and
    SMARC Carrier-II EVK development boards,
  - Add initial support for the R8A779F4 variant of the R-Car S4-8 SoC
    and the R-Car S4 Starter Kit development board,
  - Apply DT overlays to base DTBs to improve validation and usability.

* tag 'renesas-dts-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits)
  arm64: dts: renesas: Apply overlays to base dtbs
  arm64: dts: renesas: rzg3s-smarc-som: Spelling s/device-type/device_type/
  arm64: dts: renesas: r9a08g045: Add missing cache-level for L3 cache
  arm64: dts: renesas: r9a08g045: Add nodes for SDHI1 and SDHI2
  arm64: dts: renesas: ebisu: Document Ebisu-4D support
  arm64: dts: renesas: Add R-Car S4 Starter Kit support
  arm64: dts: renesas: Add Renesas R8A779F4 SoC support
  arm64: dts: renesas: Add initial device tree for RZ/G3S SMARC EVK board
  arm64: dts: renesas: Add initial device tree for RZ SMARC Carrier-II Board
  arm64: dts: renesas: Add initial support for RZ/G3S SMARC SoM
  arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC
  riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled
  riscv: dts: renesas: r9a07g043f: Add dma-noncoherent property
  riscv: dts: renesas: r9a07g043f: Add L2 cache node
  ARM: dts: renesas: bockw: Add FLASH node
  arm64: dts: renesas: rz-smarc: Use versa3 clk for audio mclk
  dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
  clk: tegra: fix error return case for recalc_rate
  clk: si521xx: Fix regmap write accessor
  clk: si521xx: Use REGCACHE_FLAT instead of NONE
  ...

Link: https://lore.kernel.org/r/cover.1697200123.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-10-13 22:46:42 +02:00
commit 64b5812550
26 changed files with 1080 additions and 140 deletions