ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry

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Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

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Thor Thayer 2016-03-21 16:01:46 +00:00 • committed by Dinh Nguyen

parent 95c16caaa8

commit 64ded09d29

1 changed files with 15 additions and 0 deletions

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arch/arm/boot/dts/socfpga_arria10.dtsi

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