clk: samsung: exynosautov9: add fsys1 clock support

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CMU_FSYS1 provides clocks for USB(2 x USB3.1 Gen-1, 2 x USB 2.0) and
mmc. For MMC clocks, PLL_MMC(PLL0831X type) is also supported as a PLL
source clock provider.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/d4aa967538fed9667e9550a256e545026fc2fa8d.1659054220.git.chanho61.park@samsung.com

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Chanho Park 2022-07-29 09:30:24 +09:00 • committed by Krzysztof Kozlowski

parent 3477b3c3a9

commit 65522e7d86

1 changed files with 130 additions and 0 deletions

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drivers/clk/samsung/clk-exynosautov9.c

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