net: dsa: mv88e6xxx: implement .port_set_policy for Amethyst

Browse source

The 16-bit Port Policy CTL register from older chips is on 6393x changed
to Port Policy MGMT CTL, which can access more data, but indirectly and
via 8-bit registers.

The original 16-bit value is divided into first two 8-bit register in
the Port Policy MGMT CTL.

We can therefore use the previous code to compute the mask and shift,
and then
- if 0 <= shift < 8, we access register 0 in Port Policy MGMT CTL
- if 8 <= shift < 16, we access register 1 in Port Policy MGMT CTL

There are in fact other possible policy settings for Amethyst which
could be added here, but this can be done in the future.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pavana Sharma <pavana.sharma@digi.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

...

This commit is contained in:

Marek Behún 2021-03-17 14:46:43 +01:00 • committed by David S. Miller

parent de776d0d31

commit 6584b26020

3 changed files with 99 additions and 27 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

1

drivers/net/dsa/mv88e6xxx/chip.c

View file

174

drivers/net/dsa/mv88e6xxx/port.c

View file

3

drivers/net/dsa/mv88e6xxx/port.h

View file