drm/amdgpu: enable GENERIC0_INT for gfx/compute pipes

To generate an interrupt to RLC for accessing indirect
registers that CP can not access directly

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2022-04-06 12:08:12 +08:00 • committed by Alex Deucher
commit 65b462fc7e