drm/i915: Fix 852GM/GMV cdclk

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It seems 852GM/GMV uses a different HPLLCC encoding than the other
85x platforms. For 852GM/GMV cdclk is always 133MHz. Try to detect that
using the PCI revision (sinc the device ID seems useless for that). I'm
not at all sure this is a good idea, but according to the specs it
should work.

v2: Rebased to the latest
v3: Rebased to the latest

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ville Syrjälä 2015-05-22 11:22:32 +03:00 • committed by Daniel Vetter

parent 1b1d27160d

commit 65cd2b3fa5

1 changed files with 8 additions and 0 deletions

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drivers/gpu/drm/i915/intel_display.c

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