drm/i915/gvt: Optimize MMIO register handling for some large MMIO blocks

Browse source

Some of traced MMIO registers are a large continuous section. These
stuffed the MMIO lookup hash table and so waste lots of memory and
get much lower lookup performance.

Here we picked out these sections by special handling. These sections
include:
  o Display pipe registers, total 768.
  o The PVINFO page, total 1024.
  o MCHBAR_MIRROR, total 65536.
  o CSR_MMIO, total 3072.

So we removed 70,400 items from the hash table, and speed up guest
boot time by ~500ms.

v2:
  o add a local function find_mmio_block().
  o fix comments.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

...

This commit is contained in:

Changbin Du 2017-06-06 15:56:09 +08:00 • committed by Zhenyu Wang

parent af2c6399aa

commit 65f9f6febf

3 changed files with 147 additions and 114 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

162

drivers/gpu/drm/i915/gvt/handlers.c

View file

86

drivers/gpu/drm/i915/gvt/mmio.c

View file

13

drivers/gpu/drm/i915/gvt/mmio.h

View file