ALSA: hda - disable dynamic clock gating on Broxton before reset

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On Broxton, to make sure the reset controller works properly,
MISCBDCGE bit (bit 6) in CGCTL (0x48) of PCI configuration space
need be cleared before reset and set back to 1 after reset.
Otherwise, it may prevent the CORB/RIRB logic from being reset.

Signed-off-by: Libin Yang <libin.yang@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.4+
Signed-off-by: Takashi Iwai <tiwai@suse.de>

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Libin Yang 2016-01-29 20:39:09 +08:00 • committed by Takashi Iwai

parent 3ec622f409

commit 6639484dda

1 changed files with 13 additions and 0 deletions

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sound/pci/hda/hda_intel.c

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