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iommu/arm-smmu: ThunderX mis-extends 64bit registers
The SMMU architecture defines two different behaviors when 64-bit registers are written with 32-bit writes. The first behavior causes zero extension into the upper 32-bits. The second behavior splits a 64-bit register into "normal" 32-bit register pairs. On some buggy implementations, registers incorrectly zero extended when they should instead behave as normal 32-bit register pairs. Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> [will: removed redundant macro parameters] Signed-off-by: Will Deacon <will.deacon@arm.com>
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