iommu/amd: Add support for X2APIC IOMMU interrupts

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AMD IOMMU requires IntCapXT registers to be setup in order to generate
its own interrupts (for Event Log, PPR Log, and GA Log) with 32-bit
APIC destination ID. Without this support, AMD IOMMU MSI interrupts
will not be routed correctly when booting the system in X2APIC mode.

Cc: Joerg Roedel <joro@8bytes.org>
Fixes: 90fcffd9cf ('iommu/amd: Add support for IOMMU XT mode')
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

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Suthikulpanit, Suravee 2019-07-16 04:29:16 +00:00 • committed by Joerg Roedel

parent 201c1db90c

commit 6692981295

2 changed files with 99 additions and 0 deletions

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90

drivers/iommu/amd_iommu_init.c

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9

drivers/iommu/amd_iommu_types.h

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