perf: RISC-V: use BIT_ULL for u64 overflow masks

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Overflow status and restart masks are u64, but bits were built with
BIT(). On RV32 that is an unsigned long shift, so indices >= 32 truncate
or wrap and corrupt the mask.

Use BIT_ULL() for those u64 bitops.

Fixes: a8625217a0 ("drivers/perf: riscv: Implement SBI PMU snapshot function")
Assisted-by: DeepSeek:deepseek-v3
Signed-off-by: Xixin Liu <liuxixin@kylinos.cn>
Link: https://patch.msgid.link/prpmask01bitul.v2.1786434000.git.liuxixin@kylinos.cn
Cc: stable@vger.kernel.org
[pjw@kernel.org: updated to apply]
Signed-off-by: Paul Walmsley <pjw@kernel.org>

...

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Xixin Liu 2026-08-18 17:10:00 +08:00 • committed by Paul Walmsley

parent ddeaa39406

commit 6693171c8c

1 changed files with 3 additions and 3 deletions

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drivers/perf/riscv_pmu_sbi.c

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