PCI/AER: Cache capability position

Save the position of the error reporting capability so it doesn't need to
be rediscovered during error handling.

Signed-off-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Lukas Wunner <lukas@wunner.de>
This commit is contained in:
Keith Busch 2016-09-27 16:23:34 -04:00 • committed by Bjorn Helgaas
commit 66b8080991
4 changed files with 24 additions and 12 deletions