ARM: dts: rockchip: Remove @0 from the veyron memory node

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The Coreboot version on veyron ChromeOS devices seems to ignore
memory@0 nodes when updating the available memory and instead
inserts another memory node without the address.

This leads to 4GB systems only ever be using 2GB as the memory@0
node takes precedence. So remove the @0 for veyron devices.

Fixes: 0b639b815f ("ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards")
Cc: stable@vger.kernel.org
Reported-by: Heikki Lindholm <holin@iki.fi>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

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This commit is contained in:

Heiko Stuebner 2018-11-18 20:03:02 +01:00

parent 651022382c

commit 672e60b72b

1 changed files with 5 additions and 1 deletions

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arch/arm/boot/dts/rk3288-veyron.dtsi

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