arm64: entry: Place an SB sequence following an ERET instruction

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Some CPUs can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at the point of an ERET, this could potentially be used as part of a
side-channel attack.

This patch emits an SB sequence after each ERET so that speculation is
held up on exception return.

Signed-off-by: Will Deacon <will.deacon@arm.com>

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This commit is contained in:

Will Deacon 2018-06-14 11:23:38 +01:00

parent bd4fb6d270

commit 679db70801

3 changed files with 7 additions and 0 deletions

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arch/arm64/kernel/entry.S

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arch/arm64/kvm/hyp/entry.S

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arch/arm64/kvm/hyp/hyp-entry.S

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