clk: samsung: exynosautov9: correct register offsets of peric0/c1

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Some register offsets of peric0 and peric1 cmu blocks need to be
corrected and re-ordered by numerical order.

Fixes: f2dd366992 ("clk: samsung: exynosautov9: add cmu_peric0 clock support")
Fixes: b35f27fe73 ("clk: samsung: exynosautov9: add cmu_peric1 clock support")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220727021357.152421-4-chanho61.park@samsung.com

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Chanho Park 2022-07-27 11:13:57 +09:00 • committed by Krzysztof Kozlowski

parent 6ac24a3a24

commit 67d9894340

1 changed files with 10 additions and 10 deletions

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drivers/clk/samsung/clk-exynosautov9.c

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