net: phy: realtek: add delay to fix RXC generation issue

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PHY will delay about 11.5ms to generate RXC clock when switching from
power down to normal operation. Read/write registers would also cause RXC
become unstable and stop for a while during this process. Realtek engineer
suggests 15ms or more delay can workaround this issue.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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Joakim Zhang 2021-06-08 11:15:35 +08:00 • committed by David S. Miller

parent d90db36a9e

commit 6813cc8cfd

1 changed files with 14 additions and 1 deletions

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drivers/net/phy/realtek.c

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