x86/mce: Enable additional error logging on certain Intel CPUs

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The Xeon versions of Sandy Bridge, Ivy Bridge and Haswell support an
optional additional error logging mode which is enabled by an MSR.

Previously, this mode was enabled from the mcelog(8) tool via /dev/cpu,
but userspace should not be poking at MSRs. So move the enabling into
the kernel.

 [ bp: Correct the explanation why this is done. ]

Suggested-by: Boris Petkov <bp@alien8.de>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20201030190807.GA13884@agluck-desk2.amr.corp.intel.com

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Tony Luck 2020-10-30 12:04:00 -07:00 • committed by Borislav Petkov

parent 633cdaf29e

commit 68299a42f8

2 changed files with 21 additions and 0 deletions

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1

arch/x86/include/asm/msr-index.h

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20

arch/x86/kernel/cpu/mce/intel.c

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