mmc: tegra: Mark 64 bit dma broken on Tegra186

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SDHCI controllers on Tegra186 support 40 bit addressing.
IOVA addresses are 48-bit wide on Tegra186.
SDHCI host common code sets dma mask as either 32-bit or 64-bit.
To avoid access issues when SMMU is enabled, disable 64-bit dma.

Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

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Krishna Reddy 2017-09-08 12:48:33 -07:00 • committed by Ulf Hansson

parent faf73fa17c

commit 68481a7e1c

1 changed files with 9 additions and 1 deletions

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drivers/mmc/host/sdhci-tegra.c

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