clk: agilex/stratix10: fix bypass representation

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Each of these clocks(s2f_usr0/1, sdmmc_clk, gpio_db, emac_ptp,
emac0/1/2) have a bypass setting that can use the boot_clk. The
previous representation was not correct.

Fix the representation.

Fixes: 80c6b7a089 ("clk: socfpga: agilex: add clock driver for the Agilex platform")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210611025201.118799-2-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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This commit is contained in:

Dinh Nguyen 2021-06-10 21:51:59 -05:00 • committed by Stephen Boyd

parent efbe21df3e

commit 6855ee8396

2 changed files with 91 additions and 21 deletions

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57

drivers/clk/socfpga/clk-agilex.c

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55

drivers/clk/socfpga/clk-s10.c

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