Amlogic clock updates for v5.14

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* Use determine_rate() for the pll ops instead of round_rate()
 * Restrict gp0/1 and audio plls range on g12a/sm1
 * Improve axg-audio controller error on deferral
 * Add NNA clocks on g12a
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Merge tag 'clk-meson-v5.14-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull Amlogic clk driver updates from Jerome Brunet:

 - Use determine_rate() for the pll ops instead of round_rate()
 - Restrict gp0/1 and audio plls range on g12a/sm1
 - Improve axg-audio controller error on deferral
 - Add NNA clocks on g12a

* tag 'clk-meson-v5.14-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: g12a: Add missing NNA source clocks for g12b
  clk: meson: axg-audio: improve deferral handling
  clk: meson: g12a: fix gp0 and hifi ranges
  clk: meson: pll: switch to determine_rate for the PLL ops

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This commit is contained in:

Stephen Boyd 2021-06-22 13:01:30 -07:00

parent 6efb943b86 8271813e40

commit 686f225039

3 changed files with 24 additions and 15 deletions

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5

drivers/clk/meson/axg-audio.c

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26

drivers/clk/meson/clk-pll.c

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8

drivers/clk/meson/g12a.c

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