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iommu/riscv: Enable SVNAPOT support for contiguous ptes
This turns on a 64k page size. The "RISC-V IOMMU Architecture Specification" states: 6.4 IOMMU capabilities [..] IOMMU implementations must support the Svnapot standard extension for NAPOT Translation Contiguity. So just switch it on unconditionally. Cc: Xu Lu <luxu.kernel@bytedance.com> Tested-by: Vincent Chen <vincent.chen@sifive.com> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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