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staging: brcm80211: replaced #ifdef __mips__ sections by W_REG_FLUSH
Code cleanup. A read-after-write construct is present in the code to ensure write order for certain Broadcom chips. Those chips are: bcm4706, bcm4716, bcm4717, bcm4718. All these chips contain a MIPS processor. This patch gets rid of several #ifdef __mips__ sections by defining a new macro in a header file. This patch does not introduce behavioral changes and is purely meant for code cleanup. The __mips__ define will be made more specific in a future patch. Signed-off-by: Roland Vossen <rvossen@broadcom.com> Reviewed-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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