OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize

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The original CDP kernel that this code comes from waited for 0x800
loops after switching the CORE DPLL M2 divider.  This does not appear
to be necessary.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

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Paul Walmsley 2009-06-19 19:08:24 -06:00 • committed by paul

parent cd07ecc828

commit 6adb8f388e

1 changed files with 0 additions and 3 deletions

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arch/arm/mach-omap2/sram34xx.S

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