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arm64: dts: qcom: sdm845: Affirm IDR0.CCTW on apps_smmu
On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com> Tested-by: Steev Klimaszewski <steev@kali.org> # Thinkpad X13s (sc8280xp) Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on sdm845-rb3 Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-6-5b3a8662403d@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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